Escalating demands for high density and performance associated with ultra large scale integration require semiconductor devices with design features of 0.25 microns and under, e.g. 0.18 microns, increased transistor and circuit speeds, high reliability, and increased manufacturing throughput. The reduction of design features to 0.25 microns and under challenges the limitations of conventional semiconductor technology for isolating active regions.
Conventional semiconductor devices comprise a substrate having various electrically isolated regions, called active regions, in which individual circuit components are formed. The active region typically includes source/drain regions of a transistor formed in the semiconductor substrate or epitaxial layer, spaced apart by a channel region. A gate electrode for switching the transistor is formed on the channel with a gate oxide layer therebetween. The quality and thickness of the gate oxide are crucial for the performance and reliability of the finished device.
The electrical isolation of these active regions is typically accomplished by defining field regions bounding the active regions, using a source/drain mask applied to a barrier nitride layer deposited over the semiconductor substrate, typically doped monocrystalline silicon or an epitaxial layer formed on a semiconductor substrate. The field oxide that isolates the active regions is typically formed by thermal oxidation.
For example, one type of isolation is known as Local Oxidation Of Silicon (LOCOS), in which the entirety of the field oxide is formed by heating the substrate with the field regions exposed to an oxidizing gas, such as oxygen or water vapor. LOCOS methodology, however, disadvantageously results in the formation of a field oxide region having tapering edges, because the oxidizing species for forming the field oxide diffuses horizontally once it has penetrated the substrate. This tapering end portion resembles and, therefore, is commonly referred to as, a "bird's beak."
LOCOS methodology is thus subject to several inherent problems. For example, while the horizontal extent of the bird's beak can be loosely controlled by the stress induced in the masking layers adjacent to the field, this same stress can cause strain defects in the active areas including point defects, dislocations, stacking faults, as well as catastrophic failures such as delamination, particle generation, etc. Moreover, the aggressive scaling of gate electrode dimension into the deep submicron regime, such as less than about 0.25 microns, requires tighter source/drain region to source/drain region spacing, which is adversely affected by the bird's beak attendant upon LOCOS methodology.
Another type of isolation is known as shallow trench isolation (STI). This form of isolation is typically accomplished by etching a trench in the substrate, conducting a thermal oxidation step to grow an oxide liner on the trench walls to control the silicon-silicon dioxide interface quality, and filling the lined trench with an insulating material, such as silicon dioxide derived from tetraethyl orthosilicate (TEOS). The surface is then planarized, as by chemical-mechanical polishing (CMP), to complete the trench isolation structure.
A typical trench isolation structure thus comprises an internal surface with side surfaces extending into the substrate (or epitaxial layer) with edges at the main surface of the substrate and at the bottom of the trench. Due to "reentrance" of the side walls, which occurs when the side walls expand inwardly and vertically align during the oxidation of the liner oxide, stress is disadvantageously induced at the side walls of the trench. Reentrance is further exacerbated in the deep submicron regime, since the greater aspect ratio of the isolation trenches leads to more vertical side walls. When the trench is later exposed to higher temperatures, for example, to round the edges of the liner oxide, the stress induced at the side walls is transmitted to the active regions of the substrate. As a result, the quality of the gate oxide over the stressed active regions is degraded, adversely affecting the performance of the finished device.